CS 7937: Architecture & VLSI Seminar
The Architecture Reading Club convenes once every week and is organized by the Utah Arch Research Group. The seminar's objective is to discuss various aspects of modern computer architecture. Every meeting is encouraged to be an interactive session where presenters talk about recent papers published in top tier computer architecture, operating systems, circuit design conferences.
Students registered for credits are expected to present at least once during the course of the semester. To sign up for a slot, send an email to Arjun (arjunmax@cs.utah.edu) with the subject line arch-rd-signup and mention the date and the links to the paper(s).
Fall 2017 Schedule
| Date | Presenter | Paper(s) | Links |
|---|---|---|---|
| Sep 1 | Surya Narayanan | Amnesiac Automatic Computer, ASPLOS 2017 | paper | Sep 8 | Karl | An Experimental Microarchitecture for a Superconducting Quantum Processor | paper | Sep 15 | Anirban | Race logic: a hardware acceleration for dynamic programming algorithms | paper | Sep 22 | Meysam | Telling Your Secrets Without Page Faults: Stealthy Page Table-Based Attacks on Enclaved Execution | paper | Sep 29 | Sumanth | DICE: Compressing DRAM Caches for Bandwidth and Capacity | paper | Oct 6 | Nupur | TETRIS: Scalable and Efficient Neural Network Acceleration with 3D memory | paper | Oct 20 | No-Presentation | Oct 27 | Arjun | Perceptron Learning for Reuse Prediction | paper | Nov 3 | Keeton | Heterogeneous Hardware/Software Acceleration of the BWA-MEM DNA Alignment Algorithm | paper | Nov 10 | Shirley | Fine-Grained DRAM: Energy-Efficient DRAM for Extreme Bandwidth Systems | paper | Dec 1 | Payman | Exploring Hyper-dimensional Associative Memory | paper |
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