Utah Arch Research Group

The Utah Arch research group is involved in Computer Architecture and VLSI Research at the School of Computing, University of Utah. Led by Dr. Rajeev Balasubramonian, Dr. Mahdi Nazm Bojnordi, and Dr. Erik Brunvand, the group explores many aspects of modern and future computing systems. The group's current research focuses on memory systems, machine learning accelerators, neuromorphic architectures, hardware ray-tracing, and memory security.

Recent News

Two papers, SpinalFlow and Compact Leakage-free support for Integrity and Reliability to appear at ISCA 2020.

Book release: Innovations in the Memory System , Synthesis Lectures on Computer Architecture , Morgan and Claypool Publishers, 2019.

Two papers, GenCache and WAX to appear at MICRO 2019.

ρ: Relaxed Hierarchical ORAM - ASPLOS 2019.

The POP Detector: A Lightweight Online Program Phase Detection Framework - ISPASS 2019.

Newton: Gravitating Towards the Physical Limits of Crossbar Acceleration - IEEE Micro Special Issue on Memristor-Based Computing, 2018.

Utah Arch alum, Aasheesh Kolli, receives the inaugural SIGARCH/TCCA Outstanding Dissertation Award in computer architecture.

2017 Utah Arch Ph.D., Ali Shafiee, is the School of Computing's nominee for the College of Engineering's Outstanding Dissertation Award.

Shevgoor et al.'s MICRO'15 work on the Variable Length Delta Prefetcher receives a 2017 Intel Outstanding Research in Architecture award.

VAULT: Reducing Paging Overheads in SGX with Efficient Integrity Verification Structures - ASPLOS 2018.

Secure DIMM: Moving ORAM Primitives Closer to Memory - HPCA 2018.

CACTI 7: New Tools for Interconnect Exploration in Innovative Off-Chip Memories - ACM TACO 2017.

Adaptive Time-based Encoding for Energy-Efficient Large Cache Architectures - E2SC 2017 (Held in conjunction with SC 2017).

Ali Shafiee successfully defends his PhD Thesis (August 2017)

INXS: Bridging the Throughput and Energy Gap for Spiking Neural Networks - IJCNN 2017.

The Memristive Boltzmann Machine is an IEEE Micro Top Pick.

The ISAAC deep neural network accelerator is a Top Picks Honorable Mention.

YouTube videos describing the ISAAC architecture: Part I and Part II.

Enabling Technologies for Memory Compression: Metadata, Mapping, and Prediction - ICCD 2016

Understanding and Alleviating Intra-Die and Intra-DIMM Parameter Variation in the Memory System - ICCD 2016

Mahdi Nazm Bojnordi joins the School of Computing faculty at Utah in Fall 2016.

Uri Weiser, University of Utah Ph.D. (1981), receives the ACM/IEEE Eckert-Mauchly Award.

Rajeev Balasubramonian is inducted into the ISCA hall of fame.

Naveen Muralimanohar is inducted into the ISCA hall of fame.

ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars - ISCA 2016

Addressing Service Interruptions in Memory with Thread-to-Rank Assignment - ISPASS 2016 Best Paper Award

Efficiently Prefetching Complex Address Patterns. - MICRO 2015

Avoiding Information Leakage in the Memory Controller with Fixed Service Policies. - MICRO 2015

Manjunath Shevgoor successfully defends his PhD Thesis (October 2015)

Improving Memristor Memory with Sneak Current Sharing. - ICCD 2015

Fixed-Function Hardware Sorting Accelerators for Near Data MapReduce Execution. - ICCD 2015

Daniel Kopta successfully defends his PhD Thesis (May 2015)

The Sandbox Prefetcher is a Top Picks Honorable Mention.

Overcoming the Challenges of Cross-Point Resistive Memory Architectures - HPCA 2015

Memory Considerations for Low Energy Ray Tracing - Computer Graphics Forum, 2014

DRAM Latency Divergence in Irregular GPGPU Applications - SC 2014

Why Graphics Programmers Need to Know About DRAM - SIGGRAPH 2014

Comparing Implementations of Near Data Computing with In-Memory MapReduce Workloads - IEEE Micro Special Issue on Big Data (Jul/Aug 2014)

Near-Data Processing: Insight from a Workshop at MICRO-46 - IEEE Micro Special Issue on Big Data (Jul/Aug 2014)

Seth Pugsley successfully defends his PhD Thesis (May 2014)

Dave Nellans successfully defends his PhD Thesis (May 2014)

NDC: 3D-Stacked Memory+Logic Devices for MapReduce - ISPASS 2014

MemZip: Exploring Unconventional Benefits from Memory Compression - HPCA 2014

Sandbox Prefetching - HPCA 2014

Josef Spjut successfully defends his PhD thesis (December 2013)

Power Delivery Networks for 3D-Stacked Memory - MICRO 2013

Niladrish Chatterjee successfully defends his PhD thesis (September 2013)

An Energy and Bandwidth Efficient Ray Tracing Architecture - HPG 2013

Kshitij Sudan successfully defends his PhD thesis (October 2012)

Heterogeneous DRAM for Critical Word Access - MICRO 2012

Fast, Effective BVH Updates for Animated Scenes - I3D 2012

A Mobile Accelerator Architecture for Ray Tracing - SHAW 2012

Memory System Levers for QoS - PACT 2012


Staged-Reads - HPCA 2012

Managing PCM Drift - HPCA 2012

Ani Udipi successfully defends his PhD thesis (March 2012)

Manu Awasthi successfully defends his PhD thesis (October 2011)

Tool Releases

USIMM infrastructure released for JWAC-3

SimTRaX infrastructure released for many core system simulation (hardware ray tracing)


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