Utah Arch Research Group

The Utah Arch research group is involved in Computer Architecture and VLSI Research at the School of Computing, University of Utah. Led by Dr. Rajeev Balasubramonian, Dr. Erik Brunvand, and Dr. Vijay Nagarajan the group explores many aspects of modern and future computing systems. The group's current research focuses on memory systems, machine learning accelerators, neuromorphic architectures, hardware ray-tracing, and memory security.

Recent News

XCRYPT: Accelerating Lattice Based Cryptography with Memristor Crossbar Arrays - IEEE MICRO 2023.

CANDLES: Channel-Aware Novel Dataflow-Microarchitecture Co-Design for Low Energy Sparse Neural Network Acceleration - HPCA 2022.

A Multiply-and-Accumulate Array for Machine Learning Applications Based on a 3D Nanofabric Flow - IEEE Transactions on Nanotechnology 2021.

OrderLight: Lightweight Memory-Ordering Primitive for Efficient Fine-Grained PIM Computations - MICRO 2021.

Dvé: Improving DRAM Reliability and Performance On-Demand via Coherent Replication - ISCA 2021.

Efficient Oblivious Query Processing for Range and kNN Queries - IEEE Transactions on Knowledge and Data Engineering 2021.

Two papers, SpinalFlow and Compact Leakage-free support for Integrity and Reliability - ISCA 2020.

Book release: Innovations in the Memory System , Synthesis Lectures on Computer Architecture , Morgan and Claypool Publishers, 2019.

Two papers, GenCache and WAX - MICRO 2019.

ρ: Relaxed Hierarchical ORAM - ASPLOS 2019.

The POP Detector: A Lightweight Online Program Phase Detection Framework - ISPASS 2019.

Newton: Gravitating Towards the Physical Limits of Crossbar Acceleration - IEEE Micro Special Issue on Memristor-Based Computing, 2018.

Utah Arch alum, Aasheesh Kolli, receives the inaugural SIGARCH/TCCA Outstanding Dissertation Award in computer architecture.

2017 Utah Arch Ph.D., Ali Shafiee, is the School of Computing's nominee for the College of Engineering's Outstanding Dissertation Award.

Shevgoor et al.'s MICRO'15 work on the Variable Length Delta Prefetcher receives a 2017 Intel Outstanding Research in Architecture award.

VAULT: Reducing Paging Overheads in SGX with Efficient Integrity Verification Structures - ASPLOS 2018.

Secure DIMM: Moving ORAM Primitives Closer to Memory - HPCA 2018.

Tool Releases

USIMM infrastructure released for JWAC-3

SimTRaX infrastructure released for many core system simulation (hardware ray tracing)


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